The present embodiments relate to the formation of integrated circuit structures, and more specifically to forming uniform (one example of uniformity is the same thickness) silicides in both narrow and wide trenches.
Many elegant and sophisticated processes are utilized during the formation of modern integrated circuit devices. One advance that has reduced electrical resistance is the silicidation process, which deposits a metallic layer on silicon and then performs a thermal (heating) cycle to allow the silicon to consume the metal and form a very low resistance material known as silicide. However, various issues arise when attempting to provide uniformity to the various silicides within an integrated circuit device, and the embodiments described below address such issues.